38 result = dataNode->accept( *
this );
69 for (
auto algoNode : producers ) {
70 const auto& state =
m_slot->algsStates[algoNode->getAlgoIndex()];
71 if ( AState::EVTACCEPTED == state || AState::EVTREJECTED == state ) {
96 for (
auto condAlg : node.
getProducers() ) condAlg->accept( promoter );
106 auto& states =
m_slot->algsStates;
108 const int decision = [state]() {
110 case AState::EVTACCEPTED:
112 case AState::EVTREJECTED:
119 if ( -1 == decision ) {
return false; }
125 for (
auto& consumer : output->getConsumers() ) consumer->accept( promoter );
130 if ( parents.size() == 1 ) {
131 parents[0]->accept( vis );
132 }
else if (
m_slot->parentSlot ) {
134 for (
auto& p : parents ) {
136 if ( scout.reply() ) p->accept( vis );
141 for (
auto& p : parents ) {
143 if ( scout.reply() ) p->accept( vis );
161 bool foundNonResolvedChild =
false;
162 bool foundNegativeChild =
false;
163 bool foundPositiveChild =
false;
174 auto searchResult =
m_slot->subSlotsByNode.find( node.
name() );
175 if ( searchResult !=
m_slot->subSlotsByNode.end() ) {
176 bool breakout =
false;
177 for (
unsigned int slotIndex : searchResult->second ) {
184 int& childDecision =
m_slot->controlFlowState[child->getNodeIndex()];
186 if ( childDecision == -1 )
187 foundNonResolvedChild =
true;
188 else if ( childDecision == 1 )
189 foundPositiveChild =
true;
191 foundNegativeChild =
true;
194 if ( node.
m_modeOR && foundPositiveChild ) {
198 }
else if ( !node.
m_modeOR && foundNegativeChild ) {
204 if ( foundNonResolvedChild ) {
213 if ( breakout )
break;
217 int& childDecision =
m_slot->controlFlowState[child->getNodeIndex()];
219 if ( childDecision == -1 )
220 foundNonResolvedChild =
true;
221 else if ( childDecision == 1 )
222 foundPositiveChild =
true;
224 foundNegativeChild =
true;
227 if ( node.
m_modeOR && foundPositiveChild ) {
230 }
else if ( !node.
m_modeOR && foundNegativeChild ) {
235 if ( foundNonResolvedChild )
break;
240 if ( !foundNonResolvedChild && decision == -1 ) {
242 if ( foundPositiveChild )
247 if ( foundNegativeChild )
259 if ( node.
m_allPass && !foundNonResolvedChild ) decision = 1;
261 if ( decision != -1 ) {
267 }
else if (
m_slot->parentSlot ) {
271 if ( scout.reply() ) p->accept( *
this );
278 if ( scout.reply() ) p->accept( *
this );
283 if ( oldSlot )
m_slot = oldSlot;
289 if ( searchResult !=
m_slot->subSlotsByNode.end() ) {
290 for (
unsigned int slotIndex : searchResult->second ) {
296 bool result = child->accept( *
this );
309 bool result = child->accept( *
this );
318 if ( oldSlot )
m_slot = oldSlot;
334 auto& states =
m_slot->algsStates;
338 if ( AState::INITIAL == state ) states.set( node.
getAlgoIndex(), AState::CONTROLREADY ).ignore();
341 if ( AState::CONTROLREADY == state ) {
343 result = promoter.visit( node );
363 bool allChildDecisionsResolved =
true;
367 child->accept( *
this );
369 int childDecision =
m_slot->controlFlowState[child->getNodeIndex()];
370 if ( childDecision == -1 ) allChildDecisionsResolved =
false;
379 for (
auto parent : node.
m_parents ) { parent->accept( *
this ); }
384 if ( allChildDecisionsResolved ) {
388 for (
auto parent : node.
m_parents ) { parent->accept( *
this ); }
391 return allChildDecisionsResolved;
404 auto& states =
m_slot->algsStates;
410 states.set( node.
getAlgoIndex(), AState::CONTROLREADY ).ignore( );
411 if ( dataPromoter.visit( node ) ) {
412 states.set( node.
getAlgoIndex(), AState::SCHEDULED ).ignore( );
413 states.set( node.
getAlgoIndex(), AState::EVTACCEPTED ).ignore( );
419 }
else if ( AState::CONTROLREADY == states[node.
getAlgoIndex()] && dataPromoter.visit( node ) ) {
420 states.set( node.
getAlgoIndex(), AState::SCHEDULED ).ignore( );
421 states.set( node.
getAlgoIndex(), AState::EVTACCEPTED ).ignore( );
State
Execution states of the algorithms Must have contiguous integer values 0, 1... N.
virtual bool isValidID(const EventContext &ctx, const DataObjID &id) const =0
check to see if a specific condition object ID is valid for this event
const std::vector< DataNode * > & getInputDataNodes() const
Get all consumer nodes.
const std::vector< DecisionNode * > & getParentDecisionHubs() const
Get all parent decision hubs.
unsigned int getAlgoIndex() const
Get algorithm index.
const std::vector< DataNode * > & getOutputDataNodes() const
Get all supplier nodes.
SmartIF< ICondSvc > m_condSvc
const unsigned int & getNodeIndex() const
Get node index.
const std::string & name() const
Get node name.
PrecedenceRulesGraph * m_graph
const DataObjID & name() const
const std::vector< AlgorithmNode * > & getProducers() const
Get all data object producers.
const std::vector< ControlFlowNode * > & getDaughters() const
Get children nodes.
bool m_modeOR
Whether acting as "and" (false) or "or" node (true)
bool m_modeConcurrent
Whether all daughters will be evaluated concurrently or sequentially.
bool m_inverted
Whether the selection result is negated or not.
bool m_allPass
Whether always passing regardless of daughter results.
bool m_modePromptDecision
Whether to evaluate the hub decision ASA its child decisions allow to do that.
std::vector< DecisionNode * > m_parents
Direct parent nodes.
bool visit(AlgorithmNode &) override
void addEdgeToPrecTrace(const AlgorithmNode *u, const AlgorithmNode *v)
set cause-effect connection between two algorithms in the precedence trace
AlgorithmNode * getAlgorithmNode(const std::string &algoName) const
Get the AlgorithmNode from by algorithm name using graph index.
bool visit(DecisionNode &) override
bool visitEnter(DecisionNode &) const override
bool visitEnter(DecisionNode &) const override
bool visit(DecisionNode &) override
AlgsExecutionStates::State AState
Class representing an event slot.