| # Gaudi Framework, version v22r0 |

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# pfmlib_gen_ia32.h

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    00001 /*
    00002  * Intel architectural PMU v1, v2, v3
    00003  *
    00004  * Copyright (c) 2006-2007 Hewlett-Packard Development Company, L.P.
    00005  * Contributed by Stephane Eranian <eranian@hpl.hp.com>
    00006  *
    00007  * Permission is hereby granted, free of charge, to any person obtaining a copy
    00008  * of this software and associated documentation files (the "Software"), to deal
    00009  * in the Software without restriction, including without limitation the rights
    00010  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
    00011  * of the Software, and to permit persons to whom the Software is furnished to do so,
    00012  * subject to the following conditions:
    00013  *
    00014  * The above copyright notice and this permission notice shall be included in all
    00015  * copies or substantial portions of the Software.
    00016  *
    00017  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
    00018  * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
    00019  * PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
    00020  * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
    00021  * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
    00022  * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
    00023  */
    00024 #ifndef __PFMLIB_GEN_IA32_H__
    00025 #define __PFMLIB_GEN_IA32_H__
    00026
    00027 #include <perfmon/pfmlib.h>
    00028 /*
    00029  * privilege level mask usage for architected PMU:
    00030  *
    00031  * PFM_PLM0 = OS (kernel, hypervisor, ..)
    00032  * PFM_PLM1 = unused (ignored)
    00033  * PFM_PLM2 = unused (ignored)
    00034  * PFM_PLM3 = USR (user level)
    00035  */
    00036
    00037 #ifdef __cplusplus
    00038 extern "C" {
    00039 #endif
    00040
    00041 /*
    00042  * upper limit, actual number determined dynamically
    00043  */
    00044 #define PMU_GEN_IA32_MAX_COUNTERS PFMLIB_MAX_PMCS
    00045
    00046 /*
    00047  * Even though, CPUID 0xa returns in eax the actual counter
    00048  * width, the architecture specifies that writes are limited
    00049  * to lower 32-bits. As such, only the lower 32-bit have full
    00050  * degree of freedom. That is the "useable" counter width.
    00051  */
    00052 #define PMU_GEN_IA32_COUNTER_WIDTH       32
    00053
    00054 typedef union {
    00055         unsigned long long val;                 /* complete register value */
    00056         struct {
    00057                 unsigned long sel_event_select:8;       /* event mask */
    00058                 unsigned long sel_unit_mask:8;          /* unit mask */
    00059                 unsigned long sel_usr:1;                /* user level */
    00060                 unsigned long sel_os:1;                 /* system level */
    00061                 unsigned long sel_edge:1;               /* edge detec */
    00062                 unsigned long sel_pc:1;                 /* pin control */
    00063                 unsigned long sel_int:1;                /* enable APIC intr */
    00064                 unsigned long sel_any:1;                /* any thread (v3) */
    00065                 unsigned long sel_en:1;                 /* enable */
    00066                 unsigned long sel_inv:1;                /* invert counter mask */
    00067                 unsigned long sel_cnt_mask:8;           /* counter mask */
    00068                 unsigned long sel_res2:32;
    00069         } perfevtsel;
    00070 } pfm_gen_ia32_sel_reg_t;
    00071
    00072 typedef struct {
    00073         unsigned long           cnt_mask;       /* threshold (cnt_mask)  */
    00074         unsigned int            flags;          /* counter specific flag */
    00075 } pfmlib_gen_ia32_counter_t;
    00076
    00077 #define PFM_GEN_IA32_SEL_INV    0x1     /* inverse */
    00078 #define PFM_GEN_IA32_SEL_EDGE   0x2     /* edge detect */
    00079 #define PFM_GEN_IA32_SEL_ANYTHR 0x4     /* measure on any thread (v3 and up) */
    00080
    00081 /*
    00082  * model-specific parameters for the library
    00083  */
    00084 typedef struct {
    00085         pfmlib_gen_ia32_counter_t       pfp_gen_ia32_counters[PMU_GEN_IA32_MAX_COUNTERS];
    00086         uint64_t                        reserved[4];    /* for future use */
    00087 } pfmlib_gen_ia32_input_param_t;
    00088
    00089 typedef struct {
    00090         uint64_t        reserved[8];            /* for future use */
    00091 } pfmlib_gen_ia32_output_param_t;
    00092
    00093 #ifdef __cplusplus /* extern C */
    00094 }
    00095 #endif
    00096
    00097 #endif /* __PFMLIB_GEN_IA32_H__ */

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