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perfmon_pebs_smpl.h
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1 /*
2 * Copyright (c) 2009 Google, Inc
3 * Contributed by Stephane Eranian <eranian@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of version 2 of the GNU General Public
7 * License as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307 USA
18 *
19 */
20 #ifndef __PERFMON_PEBS_SMPL_H__
21 #define __PERFMON_PEBS_SMPL_H__ 1
22
23 /*
24 * The 32-bit and 64-bit formats are identical, thus we use only
25 * one name for the format.
26 */
27 #define PFM_PEBS_SMPL_NAME "pebs"
28
29 #define PFM_PEBS_NUM_CNT_RESET 8
30 /*
31 * format specific parameters (passed at context creation)
32 *
33 * intr_thres: index from start of buffer of entry where the
34 * PMU interrupt must be triggered. It must be several samples
35 * short of the end of the buffer.
36 */
37 typedef struct {
38 uint64_t buf_size; /* size of the PEBS buffer in bytes */
39 uint64_t cnt_reset[PFM_PEBS_NUM_CNT_RESET]; /* counter reset values */
40 uint64_t reserved2[23]; /* for future use */
41 } pfm_pebs_smpl_arg_t;
42
43 /*
44 * This header is at the beginning of the sampling buffer returned to the user.
45 *
46 * Because of PEBS alignement constraints, the actual PEBS buffer area does
47 * not necessarily begin right after the header. The hdr_start_offs must be
48 * used to compute the first byte of the buffer. The offset is defined as
49 * the number of bytes between the end of the header and the beginning of
50 * the buffer. As such the formula is:
51 * actual_buffer = (unsigned long)(hdr+1)+hdr->hdr_start_offs
52 */
53 typedef struct {
54 uint64_t overflows; /* #overflows for buffer */
55 uint64_t count; /* number of valid samples */
56 uint64_t buf_size; /* total buffer size */
57 uint64_t pebs_size; /* pebs buffer size */
58 uint32_t version; /* smpl format version */
59 uint32_t entry_size; /* pebs sample size */
60 uint64_t reserved2[11]; /* for future use */
61 } pfm_pebs_smpl_hdr_t;
62
63 /*
64 * Sample format as mandated by Intel documentation.
65 * The same format is used in both 32 and 64 bit modes.
66 */
67 typedef struct {
68 uint64_t eflags;
69 uint64_t ip;
70 uint64_t eax;
71 uint64_t ebx;
72 uint64_t ecx;
73 uint64_t edx;
74 uint64_t esi;
75 uint64_t edi;
76 uint64_t ebp;
77 uint64_t esp;
78 uint64_t r8; /* 0 in 32-bit mode */
79 uint64_t r9; /* 0 in 32-bit mode */
80 uint64_t r10; /* 0 in 32-bit mode */
81 uint64_t r11; /* 0 in 32-bit mode */
82 uint64_t r12; /* 0 in 32-bit mode */
83 uint64_t r13; /* 0 in 32-bit mode */
84 uint64_t r14; /* 0 in 32-bit mode */
85 uint64_t r15; /* 0 in 32-bit mode */
86 } pfm_pebs_core_smpl_entry_t;
87
88 /*
89 * Sample format as mandated by Intel documentation.
90 * The same format is used in both 32 and 64 bit modes.
91 */
92 typedef struct {
93 uint64_t eflags;
94 uint64_t ip;
95 uint64_t eax;
96 uint64_t ebx;
97 uint64_t ecx;
98 uint64_t edx;
99 uint64_t esi;
100 uint64_t edi;
101 uint64_t ebp;
102 uint64_t esp;
103 uint64_t r8; /* 0 in 32-bit mode */
104 uint64_t r9; /* 0 in 32-bit mode */
105 uint64_t r10; /* 0 in 32-bit mode */
106 uint64_t r11; /* 0 in 32-bit mode */
107 uint64_t r12; /* 0 in 32-bit mode */
108 uint64_t r13; /* 0 in 32-bit mode */
109 uint64_t r14; /* 0 in 32-bit mode */
110 uint64_t r15; /* 0 in 32-bit mode */
111 uint64_t ia32_perf_global_status;
112 uint64_t daddr;
113 uint64_t dsrc_enc;
114 uint64_t latency;
115 } pfm_pebs_nhm_smpl_entry_t;
116
117 /*
118 * 64-bit PEBS record format is described in
119 * http://www.intel.com/technology/64bitextensions/30083502.pdf
120 *
121 * The format does not peek at samples. The sample structure is only
122 * used to ensure that the buffer is large enough to accomodate one
123 * sample.
124 */
125 #ifdef __i386__
126 typedef struct {
127 uint32_t eflags;
128 uint32_t ip;
129 uint32_t eax;
130 uint32_t ebx;
131 uint32_t ecx;
132 uint32_t edx;
133 uint32_t esi;
134 uint32_t edi;
135 uint32_t ebp;
136 uint32_t esp;
137 } pfm_pebs_p4_smpl_entry_t;
138 #else
139 typedef struct {
140 uint64_t eflags;
141 uint64_t ip;
142 uint64_t eax;
143 uint64_t ebx;
144 uint64_t ecx;
145 uint64_t edx;
146 uint64_t esi;
147 uint64_t edi;
148 uint64_t ebp;
149 uint64_t esp;
150 uint64_t r8;
151 uint64_t r9;
152 uint64_t r10;
153 uint64_t r11;
154 uint64_t r12;
155 uint64_t r13;
156 uint64_t r14;
157 uint64_t r15;
158 } pfm_pebs_p4_smpl_entry_t;
159 #endif
160
161 #define PFM_PEBS_SMPL_VERSION_MAJ 1U
162 #define PFM_PEBS_SMPL_VERSION_MIN 0U
163 #define PFM_PEBS_SMPL_VERSION \
164 ( ( ( PFM_PEBS_SMPL_VERSION_MAJ & 0xffff ) << 16 ) | ( PFM_PEBS_SMPL_VERSION_MIN & 0xffff ) )
165
166 #endif /* __PERFMON_PEBS_SMPL_H__ */
pfm_pebs_nhm_smpl_entry_t::eax
uint64_t eax
Definition: perfmon_pebs_smpl.h:95
pfm_pebs_smpl_arg_t::buf_size
uint64_t buf_size
Definition: perfmon_pebs_smpl.h:38
pfm_pebs_p4_smpl_entry_t::r15
uint64_t r15
Definition: perfmon_pebs_smpl.h:157
PFM_PEBS_NUM_CNT_RESET
#define PFM_PEBS_NUM_CNT_RESET
Definition: perfmon_pebs_smpl.h:29
pfm_pebs_nhm_smpl_entry_t::r9
uint64_t r9
Definition: perfmon_pebs_smpl.h:104
pfm_pebs_p4_smpl_entry_t::edi
uint64_t edi
Definition: perfmon_pebs_smpl.h:147
pfm_pebs_nhm_smpl_entry_t::ebx
uint64_t ebx
Definition: perfmon_pebs_smpl.h:96
pfm_pebs_p4_smpl_entry_t::edx
uint64_t edx
Definition: perfmon_pebs_smpl.h:145
pfm_pebs_nhm_smpl_entry_t::dsrc_enc
uint64_t dsrc_enc
Definition: perfmon_pebs_smpl.h:113
pfm_pebs_p4_smpl_entry_t::esp
uint64_t esp
Definition: perfmon_pebs_smpl.h:149
pfm_pebs_p4_smpl_entry_t::ebp
uint64_t ebp
Definition: perfmon_pebs_smpl.h:148
pfm_pebs_smpl_hdr_t::count
uint64_t count
Definition: perfmon_pebs_smpl.h:55
pfm_pebs_p4_smpl_entry_t
Definition: perfmon_pebs_p4_smpl.h:136
pfm_pebs_nhm_smpl_entry_t::r12
uint64_t r12
Definition: perfmon_pebs_smpl.h:107
pfm_pebs_p4_smpl_entry_t::ip
uint64_t ip
Definition: perfmon_pebs_smpl.h:141
pfm_pebs_p4_smpl_entry_t::r12
uint64_t r12
Definition: perfmon_pebs_smpl.h:154
pfm_pebs_p4_smpl_entry_t::r11
uint64_t r11
Definition: perfmon_pebs_smpl.h:153
pfm_pebs_p4_smpl_entry_t::ecx
uint64_t ecx
Definition: perfmon_pebs_smpl.h:144
pfm_pebs_nhm_smpl_entry_t::r10
uint64_t r10
Definition: perfmon_pebs_smpl.h:105
uint64_t
unsigned long long uint64_t
Definition: instrset.h:143
pfm_pebs_smpl_hdr_t::entry_size
uint32_t entry_size
Definition: perfmon_pebs_smpl.h:59
pfm_pebs_nhm_smpl_entry_t::r11
uint64_t r11
Definition: perfmon_pebs_smpl.h:106
pfm_pebs_nhm_smpl_entry_t::latency
uint64_t latency
Definition: perfmon_pebs_smpl.h:114
pfm_pebs_p4_smpl_entry_t::r13
uint64_t r13
Definition: perfmon_pebs_smpl.h:155
pfm_pebs_nhm_smpl_entry_t::ebp
uint64_t ebp
Definition: perfmon_pebs_smpl.h:101
pfm_pebs_nhm_smpl_entry_t::edx
uint64_t edx
Definition: perfmon_pebs_smpl.h:98
pfm_pebs_p4_smpl_entry_t::r8
uint64_t r8
Definition: perfmon_pebs_smpl.h:150
pfm_pebs_nhm_smpl_entry_t::esi
uint64_t esi
Definition: perfmon_pebs_smpl.h:99
pfm_pebs_nhm_smpl_entry_t::r15
uint64_t r15
Definition: perfmon_pebs_smpl.h:110
pfm_pebs_nhm_smpl_entry_t::esp
uint64_t esp
Definition: perfmon_pebs_smpl.h:102
pfm_pebs_smpl_hdr_t::overflows
uint64_t overflows
Definition: perfmon_pebs_smpl.h:54
pfm_pebs_p4_smpl_entry_t::eflags
uint64_t eflags
Definition: perfmon_pebs_smpl.h:140
pfm_pebs_nhm_smpl_entry_t::edi
uint64_t edi
Definition: perfmon_pebs_smpl.h:100
pfm_pebs_nhm_smpl_entry_t::r13
uint64_t r13
Definition: perfmon_pebs_smpl.h:108
pfm_pebs_p4_smpl_entry_t::esi
uint64_t esi
Definition: perfmon_pebs_smpl.h:146
pfm_pebs_nhm_smpl_entry_t::eflags
uint64_t eflags
Definition: perfmon_pebs_smpl.h:93
uint32_t
unsigned int uint32_t
Definition: instrset.h:141
pfm_pebs_nhm_smpl_entry_t::daddr
uint64_t daddr
Definition: perfmon_pebs_smpl.h:112
pfm_pebs_nhm_smpl_entry_t::ip
uint64_t ip
Definition: perfmon_pebs_smpl.h:94
pfm_pebs_smpl_hdr_t
Definition: perfmon_pebs_smpl.h:53
pfm_pebs_smpl_arg_t
Definition: perfmon_pebs_smpl.h:37
pfm_pebs_smpl_hdr_t::pebs_size
uint64_t pebs_size
Definition: perfmon_pebs_smpl.h:57
pfm_pebs_nhm_smpl_entry_t::ecx
uint64_t ecx
Definition: perfmon_pebs_smpl.h:97
pfm_pebs_p4_smpl_entry_t::r14
uint64_t r14
Definition: perfmon_pebs_smpl.h:156
pfm_pebs_nhm_smpl_entry_t
Definition: perfmon_pebs_smpl.h:92
pfm_pebs_nhm_smpl_entry_t::r14
uint64_t r14
Definition: perfmon_pebs_smpl.h:109
pfm_pebs_core_smpl_entry_t
Definition: perfmon_pebs_core_smpl.h:111
pfm_pebs_nhm_smpl_entry_t::ia32_perf_global_status
uint64_t ia32_perf_global_status
Definition: perfmon_pebs_smpl.h:111
pfm_pebs_smpl_hdr_t::version
uint32_t version
Definition: perfmon_pebs_smpl.h:58
pfm_pebs_p4_smpl_entry_t::eax
uint64_t eax
Definition: perfmon_pebs_smpl.h:142
pfm_pebs_p4_smpl_entry_t::r10
uint64_t r10
Definition: perfmon_pebs_smpl.h:152
pfm_pebs_nhm_smpl_entry_t::r8
uint64_t r8
Definition: perfmon_pebs_smpl.h:103
pfm_pebs_smpl_hdr_t::buf_size
uint64_t buf_size
Definition: perfmon_pebs_smpl.h:56
pfm_pebs_p4_smpl_entry_t::r9
uint64_t r9
Definition: perfmon_pebs_smpl.h:151
pfm_pebs_p4_smpl_entry_t::ebx
uint64_t ebx
Definition: perfmon_pebs_smpl.h:143