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Gaudi Framework, version v23r2 |
| Home | Generated: Thu Jun 28 2012 |
00001 /* 00002 * Copyright (c) 2005-2007 Hewlett-Packard Development Company, L.P. 00003 * Contributed by Stephane Eranian <eranian@hpl.hp.com> 00004 * 00005 * This program is free software; you can redistribute it and/or 00006 * modify it under the terms of version 2 of the GNU General Public 00007 * License as published by the Free Software Foundation. 00008 * 00009 * This program is distributed in the hope that it will be useful, 00010 * but WITHOUT ANY WARRANTY; without even the implied warranty of 00011 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 00012 * General Public License for more details. 00013 * 00014 * You should have received a copy of the GNU General Public License 00015 * along with this program; if not, write to the Free Software 00016 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 00017 * 02111-1307 USA 00018 * 00019 * This file implements the sampling format to support Intel 00020 * Precise Event Based Sampling (PEBS) feature of Pentium 4 00021 * and other Netburst-based processors. Not to be used for 00022 * Intel Core-based processors. 00023 * 00024 * What is PEBS? 00025 * ------------ 00026 * This is a hardware feature to enhance sampling by providing 00027 * better precision as to where a sample is taken. This avoids the 00028 * typical skew in the instruction one can observe with any 00029 * interrupt-based sampling technique. 00030 * 00031 * PEBS also lowers sampling overhead significantly by having the 00032 * processor store samples instead of the OS. PMU interrupt are only 00033 * generated after multiple samples are written. 00034 * 00035 * Another benefit of PEBS is that samples can be captured inside 00036 * critical sections where interrupts are masked. 00037 * 00038 * How does it work? 00039 * PEBS effectively implements a Hw buffer. The Os must pass a region 00040 * of memory where samples are to be stored. The region can have any 00041 * size. The OS must also specify the sampling period to reload. The PMU 00042 * will interrupt when it reaches the end of the buffer or a specified 00043 * threshold location inside the memory region. 00044 * 00045 * The description of the buffer is stored in the Data Save Area (DS). 00046 * The samples are stored sequentially in the buffer. The format of the 00047 * buffer is fixed and specified in the PEBS documentation. The sample 00048 * format changes between 32-bit and 64-bit modes due to extended register 00049 * file. 00050 * 00051 * PEBS does not work when HyperThreading is enabled due to certain MSR 00052 * being shared being to two threads. 00053 * 00054 * What does the format do? 00055 * It provides access to the PEBS feature for both 32-bit and 64-bit 00056 * processors that support it. 00057 * 00058 * The same code is used for both 32-bit and 64-bit modes, but different 00059 * format names are used because the two modes are not compatible due to 00060 * data model and register file differences. Similarly the public data 00061 * structures describing the samples are different. 00062 * 00063 * It is important to realize that the format provides a zero-copy environment 00064 * for the samples, i.e,, the OS never touches the samples. Whatever the 00065 * processor write is directly accessible to the user. 00066 * 00067 * Parameters to the buffer can be passed via pfm_create_context() in 00068 * the pfm_pebs_smpl_arg structure. 00069 * 00070 * It is not possible to mix a 32-bit PEBS application on top of a 64-bit 00071 * host kernel. 00072 */ 00073 #ifndef __PERFMON_PEBS_P4_SMPL_H__ 00074 #define __PERFMON_PEBS_P4_SMPL_H__ 1 00075 00076 #ifdef __cplusplus 00077 extern "C" { 00078 #endif 00079 00080 #include <perfmon/perfmon.h> 00081 00082 #ifdef __i386__ 00083 #define PFM_PEBS_P4_SMPL_NAME "pebs32_p4" 00084 #else 00085 #define PFM_PEBS_P4_SMPL_NAME "pebs64_p4" 00086 #endif 00087 00088 /* 00089 * format specific parameters (passed at context creation) 00090 */ 00091 typedef struct { 00092 uint64_t cnt_reset; /* counter reset value */ 00093 size_t buf_size; /* size of the buffer in bytes */ 00094 size_t intr_thres; /* index of interrupt threshold entry */ 00095 uint64_t reserved[6]; /* for future use */ 00096 } pfm_pebs_p4_smpl_arg_t; 00097 00098 /* 00099 * DS Save Area as described in section 15.10.5 00100 */ 00101 typedef struct { 00102 unsigned long bts_buf_base; 00103 unsigned long bts_index; 00104 unsigned long bts_abs_max; 00105 unsigned long bts_intr_thres; 00106 unsigned long pebs_buf_base; 00107 unsigned long pebs_index; 00108 unsigned long pebs_abs_max; 00109 unsigned long pebs_intr_thres; 00110 uint64_t pebs_cnt_reset; 00111 } pfm_ds_area_p4_t; 00112 00113 /* 00114 * This header is at the beginning of the sampling buffer returned to the user. 00115 * 00116 * Because of PEBS alignement constraints, the actual PEBS buffer area does 00117 * not necessarily begin right after the header. The hdr_start_offs must be 00118 * used to compute the first byte of the buffer. The offset is defined as 00119 * the number of bytes between the end of the header and the beginning of 00120 * the buffer. As such the formula is: 00121 * actual_buffer = (unsigned long)(hdr+1)+hdr->hdr_start_offs 00122 */ 00123 typedef struct { 00124 uint64_t overflows; /* #overflows for buffer */ 00125 size_t buf_size; /* bytes in the buffer */ 00126 size_t start_offs; /* actual buffer start offset */ 00127 uint32_t version; /* smpl format version */ 00128 uint32_t reserved1; /* for future use */ 00129 uint64_t reserved2[5]; /* for future use */ 00130 pfm_ds_area_p4_t ds; /* DS management Area */ 00131 } pfm_pebs_p4_smpl_hdr_t; 00132 00133 /* 00134 * PEBS record format as for both 32-bit and 64-bit modes 00135 */ 00136 typedef struct { 00137 unsigned long eflags; 00138 unsigned long ip; 00139 unsigned long eax; 00140 unsigned long ebx; 00141 unsigned long ecx; 00142 unsigned long edx; 00143 unsigned long esi; 00144 unsigned long edi; 00145 unsigned long ebp; 00146 unsigned long esp; 00147 #ifdef __x86_64__ 00148 unsigned long r8; 00149 unsigned long r9; 00150 unsigned long r10; 00151 unsigned long r11; 00152 unsigned long r12; 00153 unsigned long r13; 00154 unsigned long r14; 00155 unsigned long r15; 00156 #endif 00157 } pfm_pebs_p4_smpl_entry_t; 00158 00159 #define PFM_PEBS_P4_SMPL_VERSION_MAJ 1U 00160 #define PFM_PEBS_P4_SMPL_VERSION_MIN 0U 00161 #define PFM_PEBS_P4_SMPL_VERSION (((PFM_PEBS_P4_SMPL_VERSION_MAJ&0xffff)<<16)|\ 00162 (PFM_PEBS_P4_SMPL_VERSION_MIN & 0xffff)) 00163 00164 #ifdef __cplusplus 00165 }; 00166 #endif 00167 00168 #endif /* __PERFMON_PEBS_P4_SMPL_H__ */