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perfmon_pebs_smpl.h
Go to the documentation of this file.
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/*
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* Copyright (c) 2009 Google, Inc
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* Contributed by Stephane Eranian <eranian@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of version 2 of the GNU General Public
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* License as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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* 02111-1307 USA
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*
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*/
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#ifndef __PERFMON_PEBS_SMPL_H__
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#define __PERFMON_PEBS_SMPL_H__ 1
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/*
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* The 32-bit and 64-bit formats are identical, thus we use only
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* one name for the format.
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*/
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#define PFM_PEBS_SMPL_NAME "pebs"
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#define PFM_PEBS_NUM_CNT_RESET 8
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/*
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* format specific parameters (passed at context creation)
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*
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* intr_thres: index from start of buffer of entry where the
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* PMU interrupt must be triggered. It must be several samples
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* short of the end of the buffer.
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*/
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typedef
struct
{
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uint64_t
buf_size
;
/* size of the PEBS buffer in bytes */
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uint64_t
cnt_reset[
PFM_PEBS_NUM_CNT_RESET
];
/* counter reset values */
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uint64_t
reserved2[23];
/* for future use */
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}
pfm_pebs_smpl_arg_t
;
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/*
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* This header is at the beginning of the sampling buffer returned to the user.
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*
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* Because of PEBS alignement constraints, the actual PEBS buffer area does
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* not necessarily begin right after the header. The hdr_start_offs must be
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* used to compute the first byte of the buffer. The offset is defined as
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* the number of bytes between the end of the header and the beginning of
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* the buffer. As such the formula is:
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* actual_buffer = (unsigned long)(hdr+1)+hdr->hdr_start_offs
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*/
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typedef
struct
{
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uint64_t
overflows
;
/* #overflows for buffer */
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uint64_t
count
;
/* number of valid samples */
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uint64_t
buf_size
;
/* total buffer size */
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uint64_t
pebs_size
;
/* pebs buffer size */
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uint32_t
version
;
/* smpl format version */
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uint32_t
entry_size
;
/* pebs sample size */
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uint64_t
reserved2[11];
/* for future use */
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}
pfm_pebs_smpl_hdr_t
;
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/*
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* Sample format as mandated by Intel documentation.
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* The same format is used in both 32 and 64 bit modes.
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*/
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typedef
struct
{
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uint64_t
eflags;
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uint64_t
ip;
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uint64_t
eax;
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uint64_t
ebx;
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uint64_t
ecx;
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uint64_t
edx;
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uint64_t
esi;
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uint64_t
edi;
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uint64_t
ebp;
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uint64_t
esp;
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uint64_t
r8;
/* 0 in 32-bit mode */
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uint64_t
r9;
/* 0 in 32-bit mode */
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uint64_t
r10;
/* 0 in 32-bit mode */
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uint64_t
r11;
/* 0 in 32-bit mode */
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uint64_t
r12;
/* 0 in 32-bit mode */
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uint64_t
r13;
/* 0 in 32-bit mode */
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uint64_t
r14;
/* 0 in 32-bit mode */
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uint64_t
r15;
/* 0 in 32-bit mode */
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}
pfm_pebs_core_smpl_entry_t
;
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/*
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* Sample format as mandated by Intel documentation.
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* The same format is used in both 32 and 64 bit modes.
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*/
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typedef
struct
{
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uint64_t
eflags
;
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uint64_t
ip
;
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uint64_t
eax
;
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uint64_t
ebx
;
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uint64_t
ecx
;
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uint64_t
edx
;
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uint64_t
esi
;
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uint64_t
edi
;
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uint64_t
ebp
;
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uint64_t
esp
;
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uint64_t
r8
;
/* 0 in 32-bit mode */
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uint64_t
r9
;
/* 0 in 32-bit mode */
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uint64_t
r10
;
/* 0 in 32-bit mode */
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uint64_t
r11
;
/* 0 in 32-bit mode */
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uint64_t
r12
;
/* 0 in 32-bit mode */
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uint64_t
r13
;
/* 0 in 32-bit mode */
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uint64_t
r14
;
/* 0 in 32-bit mode */
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uint64_t
r15
;
/* 0 in 32-bit mode */
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uint64_t
ia32_perf_global_status
;
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uint64_t
daddr
;
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uint64_t
dsrc_enc
;
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uint64_t
latency
;
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}
pfm_pebs_nhm_smpl_entry_t
;
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/*
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* 64-bit PEBS record format is described in
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* http://www.intel.com/technology/64bitextensions/30083502.pdf
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*
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* The format does not peek at samples. The sample structure is only
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* used to ensure that the buffer is large enough to accomodate one
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* sample.
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*/
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#ifdef __i386__
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typedef
struct
{
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uint32_t
eflags;
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uint32_t
ip;
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uint32_t
eax;
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uint32_t
ebx;
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uint32_t
ecx;
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uint32_t
edx;
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uint32_t
esi;
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uint32_t
edi;
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uint32_t
ebp;
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uint32_t
esp;
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}
pfm_pebs_p4_smpl_entry_t
;
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#else
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typedef
struct
{
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uint64_t
eflags
;
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uint64_t
ip
;
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uint64_t
eax
;
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uint64_t
ebx
;
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uint64_t
ecx
;
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uint64_t
edx
;
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uint64_t
esi
;
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uint64_t
edi
;
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uint64_t
ebp
;
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uint64_t
esp
;
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uint64_t
r8
;
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uint64_t
r9
;
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uint64_t
r10
;
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uint64_t
r11
;
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uint64_t
r12
;
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uint64_t
r13
;
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uint64_t
r14
;
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uint64_t
r15
;
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}
pfm_pebs_p4_smpl_entry_t
;
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#endif
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#define PFM_PEBS_SMPL_VERSION_MAJ 1U
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#define PFM_PEBS_SMPL_VERSION_MIN 0U
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#define PFM_PEBS_SMPL_VERSION \
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( ( ( PFM_PEBS_SMPL_VERSION_MAJ & 0xffff ) << 16 ) | ( PFM_PEBS_SMPL_VERSION_MIN & 0xffff ) )
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#endif
/* __PERFMON_PEBS_SMPL_H__ */
pfm_pebs_nhm_smpl_entry_t::eax
uint64_t eax
Definition:
perfmon_pebs_smpl.h:95
pfm_pebs_smpl_arg_t::buf_size
uint64_t buf_size
Definition:
perfmon_pebs_smpl.h:38
pfm_pebs_p4_smpl_entry_t::r15
uint64_t r15
Definition:
perfmon_pebs_smpl.h:157
PFM_PEBS_NUM_CNT_RESET
#define PFM_PEBS_NUM_CNT_RESET
Definition:
perfmon_pebs_smpl.h:29
pfm_pebs_nhm_smpl_entry_t::r9
uint64_t r9
Definition:
perfmon_pebs_smpl.h:104
pfm_pebs_p4_smpl_entry_t::edi
uint64_t edi
Definition:
perfmon_pebs_smpl.h:147
pfm_pebs_nhm_smpl_entry_t::ebx
uint64_t ebx
Definition:
perfmon_pebs_smpl.h:96
pfm_pebs_p4_smpl_entry_t::edx
uint64_t edx
Definition:
perfmon_pebs_smpl.h:145
pfm_pebs_nhm_smpl_entry_t::dsrc_enc
uint64_t dsrc_enc
Definition:
perfmon_pebs_smpl.h:113
pfm_pebs_p4_smpl_entry_t::esp
uint64_t esp
Definition:
perfmon_pebs_smpl.h:149
pfm_pebs_p4_smpl_entry_t::ebp
uint64_t ebp
Definition:
perfmon_pebs_smpl.h:148
pfm_pebs_smpl_hdr_t::count
uint64_t count
Definition:
perfmon_pebs_smpl.h:55
pfm_pebs_p4_smpl_entry_t
Definition:
perfmon_pebs_p4_smpl.h:136
pfm_pebs_nhm_smpl_entry_t::r12
uint64_t r12
Definition:
perfmon_pebs_smpl.h:107
pfm_pebs_p4_smpl_entry_t::ip
uint64_t ip
Definition:
perfmon_pebs_smpl.h:141
pfm_pebs_p4_smpl_entry_t::r12
uint64_t r12
Definition:
perfmon_pebs_smpl.h:154
pfm_pebs_p4_smpl_entry_t::r11
uint64_t r11
Definition:
perfmon_pebs_smpl.h:153
pfm_pebs_p4_smpl_entry_t::ecx
uint64_t ecx
Definition:
perfmon_pebs_smpl.h:144
pfm_pebs_nhm_smpl_entry_t::r10
uint64_t r10
Definition:
perfmon_pebs_smpl.h:105
uint64_t
unsigned long long uint64_t
Definition:
instrset.h:143
pfm_pebs_smpl_hdr_t::entry_size
uint32_t entry_size
Definition:
perfmon_pebs_smpl.h:59
pfm_pebs_nhm_smpl_entry_t::r11
uint64_t r11
Definition:
perfmon_pebs_smpl.h:106
pfm_pebs_nhm_smpl_entry_t::latency
uint64_t latency
Definition:
perfmon_pebs_smpl.h:114
pfm_pebs_p4_smpl_entry_t::r13
uint64_t r13
Definition:
perfmon_pebs_smpl.h:155
pfm_pebs_nhm_smpl_entry_t::ebp
uint64_t ebp
Definition:
perfmon_pebs_smpl.h:101
pfm_pebs_nhm_smpl_entry_t::edx
uint64_t edx
Definition:
perfmon_pebs_smpl.h:98
pfm_pebs_p4_smpl_entry_t::r8
uint64_t r8
Definition:
perfmon_pebs_smpl.h:150
pfm_pebs_nhm_smpl_entry_t::esi
uint64_t esi
Definition:
perfmon_pebs_smpl.h:99
pfm_pebs_nhm_smpl_entry_t::r15
uint64_t r15
Definition:
perfmon_pebs_smpl.h:110
pfm_pebs_nhm_smpl_entry_t::esp
uint64_t esp
Definition:
perfmon_pebs_smpl.h:102
pfm_pebs_smpl_hdr_t::overflows
uint64_t overflows
Definition:
perfmon_pebs_smpl.h:54
pfm_pebs_p4_smpl_entry_t::eflags
uint64_t eflags
Definition:
perfmon_pebs_smpl.h:140
pfm_pebs_nhm_smpl_entry_t::edi
uint64_t edi
Definition:
perfmon_pebs_smpl.h:100
pfm_pebs_nhm_smpl_entry_t::r13
uint64_t r13
Definition:
perfmon_pebs_smpl.h:108
pfm_pebs_p4_smpl_entry_t::esi
uint64_t esi
Definition:
perfmon_pebs_smpl.h:146
pfm_pebs_nhm_smpl_entry_t::eflags
uint64_t eflags
Definition:
perfmon_pebs_smpl.h:93
uint32_t
unsigned int uint32_t
Definition:
instrset.h:141
pfm_pebs_nhm_smpl_entry_t::daddr
uint64_t daddr
Definition:
perfmon_pebs_smpl.h:112
pfm_pebs_nhm_smpl_entry_t::ip
uint64_t ip
Definition:
perfmon_pebs_smpl.h:94
pfm_pebs_smpl_hdr_t
Definition:
perfmon_pebs_smpl.h:53
pfm_pebs_smpl_arg_t
Definition:
perfmon_pebs_smpl.h:37
pfm_pebs_smpl_hdr_t::pebs_size
uint64_t pebs_size
Definition:
perfmon_pebs_smpl.h:57
pfm_pebs_nhm_smpl_entry_t::ecx
uint64_t ecx
Definition:
perfmon_pebs_smpl.h:97
pfm_pebs_p4_smpl_entry_t::r14
uint64_t r14
Definition:
perfmon_pebs_smpl.h:156
pfm_pebs_nhm_smpl_entry_t
Definition:
perfmon_pebs_smpl.h:92
pfm_pebs_nhm_smpl_entry_t::r14
uint64_t r14
Definition:
perfmon_pebs_smpl.h:109
pfm_pebs_core_smpl_entry_t
Definition:
perfmon_pebs_core_smpl.h:111
pfm_pebs_nhm_smpl_entry_t::ia32_perf_global_status
uint64_t ia32_perf_global_status
Definition:
perfmon_pebs_smpl.h:111
pfm_pebs_smpl_hdr_t::version
uint32_t version
Definition:
perfmon_pebs_smpl.h:58
pfm_pebs_p4_smpl_entry_t::eax
uint64_t eax
Definition:
perfmon_pebs_smpl.h:142
pfm_pebs_p4_smpl_entry_t::r10
uint64_t r10
Definition:
perfmon_pebs_smpl.h:152
pfm_pebs_nhm_smpl_entry_t::r8
uint64_t r8
Definition:
perfmon_pebs_smpl.h:103
pfm_pebs_smpl_hdr_t::buf_size
uint64_t buf_size
Definition:
perfmon_pebs_smpl.h:56
pfm_pebs_p4_smpl_entry_t::r9
uint64_t r9
Definition:
perfmon_pebs_smpl.h:151
pfm_pebs_p4_smpl_entry_t::ebx
uint64_t ebx
Definition:
perfmon_pebs_smpl.h:143
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